1. Field of the Invention
The present invention relates to a system for processing ATM (Asynchronous Transfer Mode) cells and, more particularly, to a method and an apparatus for converting the ATM cell format such that a plurality of ATM cell streams multiplexed in the payload fields of virtual containers "VC-4-NC" in the form of an "STM-N" frame structure based on CCITT Recommendations G.708 and G.709, which will be described, can be processed frame by frame or cell by cell.
2. Description of the Prior Art
An ATM transmission system using packets each having a fixed length and including a destination indication, i.e., ATM cells, is a promising digitized speech, data and picture information transmission and switching technology for future broad band ISDN (Integrated Services Digital Network). In the ATM transmission system each of, the ATM cells to be transmitted has a fixed length of 53 octets and can therefore be switched by hardware, promoting high-speed information transmission. For details of switching suitable for ATM cells, reference may be made to A. Thomas, J. P. Coudreuse and M. Servel, "Asynchronous Time-Division Techniques: An Experimental Packet Network Integrating Videocommunication", ISS '84 (May 1984), and H. Suzuki H. Hagano, T. Suzuki, T. Takeuchi and S. Iwasaki, "Output-buffer Switch Architecture for Asynchronous Transfer Mode", ICC '89 (June 1989).
On the other hand, to implement an ATM transmission network, it is desired to use existing facilities developed for a conventional STM (Synchronous Transfer Mode) transmission system. In light of this, CCITT Study Group XVIII studied the specifications of a transmission information structure compatible with the SDH (Synchronous Digital Hierarchy) which is capable of transmitting information with an 8 kHz base clock (i.e., a period of 125 .mu.s) particular to conventional apparatuses. The result of those studies was reported in June, 1990. For details of the specifications, see "Revised draft Recommendations G. 707, G.708 and G.709" in CCITT "STUDY GROUP XVIII-REPORT R-33 (COM XVIII-R 33-E) published in June 1990".
To transmit ATM cells according to, for example, the information structure of VC (Virtual Container)-4 or STM-4 compatible with SDH as prescribed by the above CCITT Recommendation, a plurality of ATM cells each being 53 octets long (more particularly including a header having five octets and an information field having 48 octets) are arranged or mapped in the payload field of VC-4-NC (N Concatenation) which has been multiplexed in the form of the "STM-N" frame construction (see the above CCITT Report, page 23, item 3, page 45, item 3.1.7, and page 58, item 5.8; "VC-4-NC" is denoted by "VC-4-ZXc" or "VC-x-mc" in this Report).
Some of such ATM cells are divided by SDH overhead fields, i.e., a section overhead (SOH) field of frame structure "STM-N" and a path overhead (POH) field of virtual container VC-4-NC, resulting in an ATM cell stream which is not continuous with respect to time. Also, since integral multiples of the 53-octet length of one ATM cell are not coincident with the information capacity of the payload field (260.times.9.times.N octets), the last ATM cell of one STM-N frame is mapped not only in the STM-N frame of interest but also in the subsequent STM-N frame and, therefore is, not continuous with respect to time. When such a plurality of ATM cells are to be switched or multiplexed on a cell basis by an ATM switch, ATM multiplexing apparatus, or similar ATM cell processing apparatus, processing them in synchronism with the frames compatible with SDH is not practicable due to the presence of the ATM cells which are not continuous with respect to time.
To convert an ATM cell stream which is discontinuous with respect to time as stated above, it has been customary to remove the section overheads (SOHs) and path overheads (POHs) from an input signal, write only the ATM cells into a buffer memory according to a write clock corresponding to the bit length and bit rate of the cells, and read them out of the buffer memory according to a read clock whose bit rate is equal to the mean bit rate of the write clock. In this manner, an ATM cell stream free from discontinuity appears at the output of the buffer memory due to the difference in bit rate between the write clock and the read clock.
Although the above-stated conventional approach is successful in removing the discontinuity of an ATM cell due to the overhead fields of one STM-N frame, it cannot cope with the discontinuity ascribable to an ATM cell extending over two successive STM-N frames. Specifically, the total information capacity of an STM-N frame is 270.times.9.times.N octets and does not coincide with integral multiples (53.times.n octets) of 53 octets, which is the length of ATM cells, as stated earlier. Hence, even though the use of a buffer memory using a write clock and a read clock different in bit rate from each other may be able to prevent an ATM cell from extending over two STM-N frames, the above approach would eventually fail to satisfy the condition of providing the correct SDH frame period (125 .mu.s).
Under the above circumstances, there is a demand for ATM cell format converting means capable of converting a plurality of ATM cells contained in a virtual container VC-4-NC having the "STM-N" frame construction to an ATM cell stream divided on a frame basis and, moreover, capable of maintaining synchronism with the 8 kHz base clock (period 125 .mu.s) of a conventional apparatus.